1. Field of the Invention
The present invention relates to a layout verification device, a layout verification program, and a layout verification method of a layout pattern of a semiconductor device, and more specifically, to a layout verification device, a layout verification program, and a layout verification method to judge validity of an error graphic output in a design rule check (DRC).
2. Description of Related Art
In a layout process of a semiconductor device, graphic shape is corrected, deleted, or added based on layout data that is previously designed in order to effectively perform layout design. In this layout design, DRC (Design Rule Check) is performed to check whether the graphic shape of the layout data that is once completed satisfies the design rule. The design rule is a standard (hereinafter referred to as design standard) to prevent malfunction that occurs in a manufacturing process. In designing the semiconductor device, the layout pattern needs to be created according to the design rule. When the error is detected as a result of DRC verification, this error is analyzed. At this time, if the correction is performed based on the layout data that is previously designed, two kinds of errors including a real error and a pseudo error are detected in the DRC verification. The real error is the error in which the layout pattern needs to be corrected, and the pseudo error is the error that is generated by calculation error or the like of the DRC verification and correction of the layout pattern is not needed for the pseudo error. It is desired to remove the pseudo error from the error that is output to extract only the real error in order to effectively analyze the verification result of the DRC verification.
In the DRC verification, the graphic showing the area that does not meet the design rule is output as the error graphic. As such, it is effective to remove the error graphic whose shape is equal to that of the error which is previously judged as the pseudo error by the graphic processing from error target in order to remove the pseudo error. One of the methods of graphic processing includes graphic shape comparison processing (Layout Versus Layout, hereinafter abbreviated as LVL). In the LVL, the error is judged as pseudo error if the error graphic shape that is detected in the layout data after correction completely matches the error graphic shape that is detected in the previous layout data.
However, even in the DRC verification that is performed on the same layout pattern, different error graphics may be output. Whereas a distance between patterns is calculated regardless of grid unit in the DRC verification, vertices of the graphic are arranged in grid intersections in the layout pattern and the error graphic. As such, when the error graphic including vertices in the grid intersections is created based on the error area created in the DRC verification, different error graphics may be created for the same error area due to occurrence of a rounding error or the like of calculation in shifting the vertex. Thus, the pseudo error cannot be removed only with the judgment of match or mismatch of the error graphics by LVL. A method of judging the equivalence of the graphic is disclosed in Japanese Unexamined Patent Application Publication No. 11-110542.
FIG. 19 shows a block diagram of a pattern extracting device 100 disclosed in Japanese Unexamined Patent Application Publication No. 11-110542. The pattern extracting device 100 will now be described. FIG. 20 shows one example of a graphic pattern processed in the pattern extracting device 100. First, the pattern extracting device 100 judges whether there is a first pattern X in a second pattern Y, and when there is a first pattern X, an area corresponding to the first pattern X is extracted from the second pattern Y. Now, the pattern extracting device 100 includes a feature point extraction unit 110, a feature amount extraction unit 111, a similarity calculation unit 112, a corresponding candidate point setting unit 113, a correspondence determination unit 114, and a corresponding point extraction unit 115. Note that an input means 101 includes a keyboard that inputs data to the pattern extracting device 100, a mouse, a storage device, and means for reading data from network. An output means 102 includes a display that displays the extraction result by the pattern extracting device 100, a printer, and other output means.
The feature point extraction unit 110 arranges feature points on each of the first pattern X and the second pattern Y. The feature amount extraction unit 111 extracts the feature amount from peripheral pattern information of the feature points for each feature point arranged by the feature point extraction unit 110. The similarity calculation unit 112 compares the feature amount of the first pattern X with that of the second pattern Y to obtain similarity of the feature point of the first pattern X and the feature point of the second pattern Y. The corresponding candidate point setting unit 113 obtains a plurality of corresponding candidate points P(i;1) to P(i;3) on the second pattern Y that may correspond to the feature point on the first pattern X based on the similarity between the feature points. The correspondence determination unit 114 repeatedly calculates the correspondence of each of the corresponding candidate points P(i;1) to P(i;3) using the similarity calculated by the similarity calculation unit 112, a distance dx between any feature point i on the first pattern X and a neighboring feature point u with a center of the feature point i, and a distance dy between the corresponding candidate points P(i;1) to P(i;3) of the feature point i and a corresponding candidate point k2 of the neighboring feature point u of the feature point i. The corresponding point extraction unit 115 extracts the corresponding candidate points P(i;1) to P(i;3) having high correspondence.
In the pattern extracting device 100, the feature point and the corresponding feature point are extracted, and the distance between the feature point and the corresponding candidate point is calculated, so as to judge similarity of the graphics. Then, similarity of the graphics is judged when the graphic is rotated or shifted in parallel by the judgment of similarity.